sky130_fd_sc_ms__inv¶
Inverter
This is a stub of cell description file
Cell name: sky130_fd_sc_ms__inv
Type: cell
Verilog name: sky130_fd_sc_ms__inv
Library: sky130_fd_sc_ms
Inputs: 1 (A)
Outputs: 1 (Y)
sky130_fd_sc_ms__inv symbols¶
sky130_fd_sc_ms__inv schematic¶
sky130_fd_sc_ms__inv GDSII layouts¶
sky130_fd_sc_ms__inv_1¶
sky130_fd_sc_ms__inv_16¶
sky130_fd_sc_ms__inv_2¶
sky130_fd_sc_ms__inv_4¶
sky130_fd_sc_ms__inv_8¶