sky130_fd_sc_hs__dfrbp

Delay flop, inverted reset, complementary outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hs__dfrbp

  • Type: cell

  • Verilog name: sky130_fd_sc_hs__dfrbp

  • Library: sky130_fd_sc_hs

  • Inputs: 3 (RESET_B, CLK, D)

  • Outputs: 2 (Q, Q_N)

sky130_fd_sc_hs__dfrbp symbols

../../../../../_images/sky130_fd_sc_hs__dfrbp.symbol.svg
../../../../../_images/sky130_fd_sc_hs__dfrbp.pp.symbol.svg

sky130_fd_sc_hs__dfrbp schematic

../libraries/sky130_fd_sc_hs/latest/cells/dfrbp/sky130_fd_sc_hs__dfrbp.schematic.svg

sky130_fd_sc_hs__dfrbp GDSII layouts

../../../../../_images/sky130_fd_sc_hs__dfrbp_1.svg

sky130_fd_sc_hs__dfrbp_1

../../../../../_images/sky130_fd_sc_hs__dfrbp_2.svg

sky130_fd_sc_hs__dfrbp_2