sky130_fd_sc_hs__and2

2-input AND

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hs__and2

  • Type: cell

  • Verilog name: sky130_fd_sc_hs__and2

  • Library: sky130_fd_sc_hs

  • Inputs: 2 (A, B)

  • Outputs: 1 (X)

sky130_fd_sc_hs__and2 symbols

../../../../../_images/sky130_fd_sc_hs__and2.symbol.svg
../../../../../_images/sky130_fd_sc_hs__and2.pp.symbol.svg

sky130_fd_sc_hs__and2 schematic

../libraries/sky130_fd_sc_hs/latest/cells/and2/sky130_fd_sc_hs__and2.schematic.svg

sky130_fd_sc_hs__and2 GDSII layouts

../../../../../_images/sky130_fd_sc_hs__and2_1.svg

sky130_fd_sc_hs__and2_1

../../../../../_images/sky130_fd_sc_hs__and2_2.svg

sky130_fd_sc_hs__and2_2

../../../../../_images/sky130_fd_sc_hs__and2_4.svg

sky130_fd_sc_hs__and2_4