sky130_fd_sc_hdll__or2

2-input OR

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__or2

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__or2

  • Library: sky130_fd_sc_hdll

  • Inputs: 2 (A, B)

  • Outputs: 1 (X)

sky130_fd_sc_hdll__or2 symbols

../../../../../_images/sky130_fd_sc_hdll__or2.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__or2.pp.symbol.svg

sky130_fd_sc_hdll__or2 schematic

../../../../../_images/sky130_fd_sc_hdll__or2.schematic.svg

sky130_fd_sc_hdll__or2 GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__or2_1.svg

sky130_fd_sc_hdll__or2_1

../../../../../_images/sky130_fd_sc_hdll__or2_2.svg

sky130_fd_sc_hdll__or2_2

../../../../../_images/sky130_fd_sc_hdll__or2_4.svg

sky130_fd_sc_hdll__or2_4

../../../../../_images/sky130_fd_sc_hdll__or2_6.svg

sky130_fd_sc_hdll__or2_6

../../../../../_images/sky130_fd_sc_hdll__or2_8.svg

sky130_fd_sc_hdll__or2_8