sky130_fd_sc_hdll__diode¶
Antenna tie-down diode
This is a stub of cell description file
Cell name: sky130_fd_sc_hdll__diode
Type: cell
Verilog name: sky130_fd_sc_hdll__diode
Library: sky130_fd_sc_hdll
Inputs: 1 (DIODE)
Outputs: 0 ()
sky130_fd_sc_hdll__diode symbols¶
sky130_fd_sc_hdll__diode schematic¶
sky130_fd_sc_hdll__diode GDSII layouts¶
sky130_fd_sc_hdll__diode_2¶
sky130_fd_sc_hdll__diode_4¶
sky130_fd_sc_hdll__diode_6¶
sky130_fd_sc_hdll__diode_8¶