sky130_fd_sc_hdll__conb

Constant value, low, high outputs

This is a stub of cell description file

  • Cell name: sky130_fd_sc_hdll__conb

  • Type: cell

  • Verilog name: sky130_fd_sc_hdll__conb

  • Library: sky130_fd_sc_hdll

  • Inputs: 0 ()

  • Outputs: 2 (HI, LO)

sky130_fd_sc_hdll__conb symbols

../../../../../_images/sky130_fd_sc_hdll__conb.symbol.svg
../../../../../_images/sky130_fd_sc_hdll__conb.pp.symbol.svg

sky130_fd_sc_hdll__conb schematic

../libraries/sky130_fd_sc_hdll/latest/cells/conb/sky130_fd_sc_hdll__conb.schematic.svg

sky130_fd_sc_hdll__conb GDSII layouts

../../../../../_images/sky130_fd_sc_hdll__conb_1.svg

sky130_fd_sc_hdll__conb_1